About

Recent papers from Meta (Facebook) and Google 1 2 3 have created a major concern about data integrity in large-scale computing in cloud data centers. The term “mercurial cores” has been coined 2 to refer to errant processor cores that have been clearly diagnosed as being the source of generating silent data errors – and recent panels (as referred to above) have brought together experts from cloud service providers and processor chip designers with the objective of raising awareness of this acute problem, and also encouraging leading edge research to devise affordable chip and system-level mitigation solutions. In addition to such data integrity concerns, the rise of data security and privacy breaches in cloud computing environments has accelerated research and development of practical solutions that enable computing with encrypted data (e.g., advanced cryptographic methods like Fully Homomorphic Computing or FHE); e.g., recent papers 4 5 6 7.

This workshop (DISCC-2023) proposes to bring together aspects of data integrity and security in a single, unified forum. The workshop will comprise of a keynote speech (or two), several contributed papers and, time permitting, a closing panel session involving leading edge experts in data integrity and security in a hyper-scale cloud computing setting. Potential speakers are encouraged to submit an extended abstract (1-2 pages) highlighting the key contributions in the light of the above-stated technical scope of the problem. Solution approaches at the algorithm, software/firmware and/or hardware level are encouraged for early dissemination and discussion in a workshop setting. Papers dealing with testing (or detection, diagnosis) of silent data errors or of malicious data breaches are solicited. Similarly, cost-effective mitigation solutions are invited for presentation.

Topics of interest include but are not limited to:

  • Testing (including detection and/or diagnosis) of silent data errors (SDEs) for plaintext and/or HE-mode ciphertext computation.
  • Detection and mitigation of malicious attacks that can lead to SDEs.
  • Privacy-preserving data-secure computation: novel software and/or hardware solutions.
  • Characterization of HE workloads for “discovery” of hardware acceleration primitives.
  • Simulation and/or emulation based modeling methods to evaluate DISCC domain software-hardware solutions.
  • Modeling of cloud-edge solutions for specific safety-, security- and/or privacy-critical applications: e.g., autonomous vehicles, internet banking, credit card fraud detection, etc.

Call for Contributions

Submitted manuscripts must be in English of up to 2 pages (with same formatting guidelines as main conference). Submissions should be submitted to the following link by September 29th October 9th, 2023. If you have questions regarding submission, please contact us: info@disccworkshop.org

Organizing Committee

  • Pradip Bose (IBM Research)
  • Jennifer Dworak (Southern Methodist University)
  • Chris Wilkerson (Intel Corp.)
  • Subhashish Mitra (Stanford University)
  • Omri Soceanu (IBM Research)
  • Silvio Dragone (IBM Research)

Extended Organizing Committee

  • Ramon Bertran (IBM Research)
  • Nandhini Chandramoorthy (IBM Research)
  • Nathan Manohar (IBM Research)
  • Nir Drucker (IBM Research)
  • Karthik Swaminathan (IBM Research)
  • Subhankar Pal (IBM Research)
  • Aporva Amarnath (IBM Research)
  • Bharat Sukhwani (IBM Research)
  • Augusto Vega (IBM Research)

Advisory Program Committee

  • Peter H. Hochschild (Google)
  • Jeffrey Hicks (Intel Corp.)
  • Rob Chappell (Microsoft)
  • Harish D. Dixit (Meta)
  • Shawn Blanton (Carnegie-Mellon University)
  • David Brooks (Harvard University)
  • Brandon Reagan (New York University)
  • Sarita Adve (University of Illinois at Urbana-Champaign)
  • Ambar Sarkar (NVIDIA)
  • Luca Carloni (Columbia University)

Past Editions

Contact

Paper Submission Deadline
September 29th, 2023
October 9th, 2023

Notification Date
October 16th, 2023

Workshop Date
October 28th, 2023

Invited Speakers

Fully Homomorphic Encryption-based Cloud Computing: Opportunities, Challenges, and (Some) Solutions

Ajay Joshi (Boston University)

Ajay Joshi is a Professor in the ECE department at Boston University. Before joining BU, he got his Ph.D. at Georgia Tech and then worked as a postdoc at MIT. He was a Visiting Researcher at Google in 2017-18 and is currently an Architect at Lightmatter Inc. His research is in the areas of computer architecture and digital VLSI with a focus on security and privacy, machine learning, and photonic computing. He received the NSF CAREER Award in 2012, Boston University ECE Department's Award for Excellence in Teaching in 2014, Best Paper Awards at ASIACCS 2018 and HOST 2023, and the Google Faculty Research Award in 2018 and 2019. He currently serves as the Associate Editor for IEEE Transactions on VLSI Systems.

Towards Practical Privacy-Preserving Neural Inference

Brandon Reagen (New York University)

Brandon Reagen is an Assistant Professor at New York University in the Tandon school of engineering. He received his Ph.D from Harvard in 2018 and undergraduate degree from the University of Massachusetts, Amherst in 2012. His research focuses on novel hardware accelerator designs for high performance and low power with applications in privacy preserving computation, including homomorphic encryption and secure multi-party computation.

Unlocking the future: Intel HERACLES and The Dawn of Encrypted Computing

Rosario Cammarota and Chris Wilkerson (Intel Corp.)

Rosario Cammarota, "Ro," is a principal engineer and Chief Scientist of Privacy-Enhanced Computing Research in the Emerging Security Lab at Intel Labs. His work includes the theory, application, and standardization of processing encrypted data. Cammarota is the principal investigator for the DARPA DPRIVE program and Intel academic centers focusing on privacy, cryptography, and security mechanisms, and leads standardization of methods for encrypted data processing with FHE at ISO/IEC. He received his Ph.D. in Computer Science from the University of California Irvine in 2013. He is a prolific author and inventor, publishing over 50 peer-reviewed articles and opening more than 50 US patents. Ro Cammarota is a Senior Member of IEEE and recipient of the SRC “Mahboob Khan” Outstanding Industry Liaison Award in 2017, 2018, and 2019.

Chris Wilkerson is a Principal Engineer at Intel Corporation and has been in the industry for 26 years including 22 at Intel. Chris has worked on a range of micro-architecture topics including low voltage micro architecture and circuits, low power, reliable design, out-of-order processor design with particular focus on branch prediction, run-ahead processing, prefetching, cache architecture, cache replacement algorithms, etc. Chris is currently the Principal Memory Architect on Intel’s DARPA funded DPRIVE Program developing an FHE accelerator.

Program:

Saturday October 28th, 2023
(all times are Eastern Time)
8:45 - 9:00 AM Introduction and Welcoming Remarks
9:00 - 10:00 AM Invited Talk: Fully Homomorphic Encryption-based Cloud Computing: Opportunities, Challenges, and (Some) Solutions
Prof. Ajay Joshi (Boston University)
10:00 - 10:30 AM Break
10:30 - 11:00 AM "Fully Homomorphic Encryption for Computer Architects: A Fundamental Characterization Study" (paper)
Subhankar Pal et al. (IBM Research)
11:00 - 11:30 AM "Toward Practical Privacy-Preserving Convolutional Neural Networks Exploiting Fully Homomorphic Encryption" (paper)
Jaiyoung Park et al. (Seoul National University)
11:30 - 12:00 PM "Accelerating Garbled Circuits by Hardware-Software Co-Design" (paper)
Jianqiao Mo and Brandon Reagen (New York University)
12:00 - 1:30 PM Lunch
1:30 - 2:30 PM Invited Talk: Towards Practical Privacy-Preserving Neural Inference
Prof. Brandon Reagen (New York University)
2:30 - 3:00 PM "Amplification of Errors by Encryption" (paper)
Evgeny Manzhosov and Simha Sethumadhavan (Columbia University)
3:00 - 3:30 PM Break
3:30 - 4:00 PM "SecNDP: Secure Near-Data Processing with Untrusted Memory" (paper)
Wenjie Xiong (Virginia Tech)
4:00 - 5:30 PM Panel: "Data Integrity in Encrypted Computation: Impossible Proposition?"
Recently, there has been a significant increase in privacy-protected, encrypted computation. The promise of effective hardware acceleration to bring paradigms like FHE (fully homomorphic encryption) within the realms of practical deployment has fueled newer innovations in the algorithm (software) aspects of this domain as well. At the same time, we have seen an escalating level of concern about the incidence of silent data corruption (SDC) and other failure modes in recent years. We have two excellent invited talks to set the stage for an engaging conversation about this topic. One of the talks describes a leading edge hardware accelerator for FHE computing and the other one talks about novel ways of SDC detection in normal (plaintext) computation.
4:00 - 4:10 PM: Panel Introduction
Bharat Sukhwani and Pradip Bose (IBM Research; moderators)
4:10 - 4:40 PM: "Unlocking the future: Intel HERACLES and The Dawn of Encrypted Computing"
Rosario Cammarota and Chris Wilkerson, Intel Corp.
4:40 - 5:10 PM: "Leveraging Canary Flip-Flops in MISR for Superior SDC Detection"
Alexander Coyle, Hui Jiang, Jennifer Dworak, Theodore Manikas, and Kundan Nepal,” Southern Methodist University
5:10 - 5:30 PM: Discussion and Q&A (moderated)
5:30 PM Concluding Remarks

Organizing Committee

Pradip Bose is a Distinguished Research Scientist and manager of Efficient and Resilient Systems at IBM T. J. Watson Research Center. He has over 39 years of experience at IBM and was a member of the pioneering RISC super scalar project at IBM (a pre-cursor to the first RS/6000 system product). He holds M.S. and Ph.D. degrees from University of Illinois at Urbana-Champaign. He is a member of IBM’s elite Academy of Technology and he is a Fellow of the IEEE.

Jennifer Dworak is a Professor of Electrical and Computer Engineering at Southern Methodist University. She holds M.S. and Ph.D degrees from Texas A&M University. Her research areas of expertise and interest include hardware security and reliability testing of integrated circuits.

Chris Wilkerson is a Principal Engineer at Intel Corporation. Chris has 12 years of experience at Intel including 10 years at different Intel research labs, and 2 in the product product micro-architecture team. His areas of expertise include: circuits, processor design, micro-architecture, architecture. In particular, his specialties are: low voltage circuits, low voltage micro architecture, low power, reliable design, out-of- order processor design with particular focus on branch prediction, runahead processing, cache design, cache replacement algorithms, etc.

Subhasish Mitra is a Professor (Depts. of Electrical Engineering and Computer Science) at Stanford University, where he leads the Robust Systems Group (among several other leadership roles). Among his many achievements, he won the IEEE Computer Society Harry H. Goode Memorial Award “for sustained contributions to design and test of computing systems in established and emerging technologies,” in 2022. He is a Fellow of the IEEE and of the ACM.

Omri Soceanu is the AI Security Group Manager at IBM Research in Haifa, Israel.

Silvio Dragone is a Research Staff Member of the “Quantum-Safe Cloud & Systems” group at the Security department of the IBM Research – Zurich Lab in Rüschlikon, Switzerland. His current focus is on Hardware Security Modules (HSM) from the architectural design, down to the integration of cryptographic algorithm in ASIC technology. Silvio Dragone obtained his PhD degree in Electrical Engineering from the Technical University Munich (TUM), Germany.

Registration

DISCC will be held in conjunction with the 56th International Symposium on Microarchitecture (MICRO 2023). Refer to the main venue to continue with the registration process.

Event Location

Westin Harbour Castle, Toronto, Canada